Microsoft Azure introduced the Maia 300 AI chip

Microsoft announced the next step in its plan to rely more on its own chips in cloud and AI infrastructure. On October 12, 2026, the company introduced Azure Maia 300. This is the third generation of Microsoft’s homegrown AI accelerator family.

Designed for long-context and multi-step workloads

The announcement was made by Scott Guthrie, vice president for Microsoft Cloud + AI, on the company’s official blog. Guthrie described Maia 300 as a “complete intelligent system” and said the chip is designed for long-context reasoning, latency-sensitive chat experiences, and multi-step agent tasks. The chip will enter production use in 2027. That same year, Microsoft aims to move the Maia family into multi-gigawatt deployments and make Maia the primary inference system across its products and services.

According to figures provided by the company, Maia 300 produces 40 percent more tokens per megawatt compared with leading GPU-based systems. In a full configuration with 96 accelerators, rack-scale token throughput rises to 7 times that of Maia 200.

Changes in memory, power, and networking

Maia 300 uses eight HBM4 stacks delivering 18.0 TB/s peak bandwidth within a 950-watt TDP. Its software-defined dataflow architecture, combined with AI-assisted core optimization, is designed to keep data local and reduce unnecessary data movement. Microsoft says treating dataflow as a core design principle provides a clear performance-per-watt advantage over traditional GPU architectures.

The chip also moves to a multi-chiplet design that separates compute, memory controller, and input/output functions; the compute chiplets are manufactured on TSMC’s N2P process node. Advanced low-precision formats such as enhanced MXFP4 are supported, reducing memory and bandwidth requirements for both compute and KV-cache; this makes larger context windows and higher throughput possible within the same power envelope.

On the networking side, Microsoft treats the network not as a separate communication layer but as an extension of the dataflow architecture. High-bandwidth interconnects between accelerators are optimized for tensor parallelism; a dedicated AI transport layer enables rack-to-rack communication over Ethernet-based infrastructure. At the rack level, 96 Maia 300 accelerators operate within a 167-kilowatt power envelope; each rack has 27.6 TB of HBM capacity and 1.7 PB/s of total HBM bandwidth.

Maia 200 in production, next step 2027

Maia 200, the predecessor to Maia 300, already serves Microsoft’s production workloads. The chip runs in Microsoft Copilot and supports the MAI team’s next-generation model development efforts. GitHub Copilot and Microsoft Foundry are planned to be added by the end of 2026. In these workloads, the chip runs OpenAI models, Microsoft’s MAI models, and leading open-source model families. Maia 200 is being deployed in the United States, Europe, and Australia; according to Microsoft, it produces 1.7 times more tokens per watt than leading GPU infrastructure in Teams, Copilot, and Cowork experiences.

Maia 200 was introduced on January 26, 2026. Manufactured on TSMC’s 3-nanometer process, the chip includes 216 GB of HBM3e memory at 7 TB/s, 272 MB of on-die SRAM, and more than 140 billion transistors; it delivers over 10 petaFLOPS of compute in FP4 within a 750-watt TDP. Microsoft says the experience gained with Maia 200 directly informed the design of Maia 300.

Microsoft announced that it will share details of the strategy and the architectural details of Maia 300 in the technical paper it published and at the Ignite 2026 event to be held in San Francisco.

Source: Unite.AI